Instruction Level Distributed Processing
Processor architects are facing a number of major challenges. Wire delays are becoming critical, and power considerations temper the availability of billions of transistors. Many important software applications are object-oriented, multithreaded, and consist of separately compiled and dynamically linked parts. To accommodate these trends in both technology and applications, future microarchitectures will process instruction streams in a distributed fashion-instruction level distributed processing (ILDP). ILDP will be implemented in a variety of ways, including both homogeneous and heterogeneous elements. To help find run-time parallelism, orchestrate distributed hardware resources, implement power conservation strategies, and to provide fault-tolerant features, an additional layer of abstraction-the virtual machine layer-will likely become an essential ingredient. By providing the architect with a layer of software, a cohesive virtual machine can be designed to provide close hardware/software interaction and runtime optimization.